User Manual

Specification Update 15
HSH21 DDR4 Power Down Timing Violation
Problem: When DDR4 is operating at 2133 MHz, the processor’s memory control may violate the
JEDEC tPRPDEN timing specification.
Implication: Intel has not observed this erratum to impact the operation of any commercially
available system
Workaround: None identified.
Status: For the affected steppings, see the Summary Tables of Changes.
HSH22 PCIe* Extended Tag Field May be Improperly Set
Problem: The Extended Tag field in the TLP Header will not be zero for TLPs issued by PCIe ports
1a, 1b, 2c, 2d, 3c, and 3d even when the Extended Tag Field Enable bit in the Device
Control Register (Offset 08H, bit 8) is 0.
Implication: This does not affect ports 0, 2a, 2b, 3a and 3b. This will not result in any functional
issues when using device that properly track and return the full 8 bit Extended Tag
value with the affected ports. However, if the Extended Tag field is not returned by a
device connected to an affected port then this may result in unexpected completions
and completion timeouts.
Workaround: None identified.
Status: For the affected steppings, see the Summary Tables of Changes.
HSH23 A MOV to CR3 When EPT is Enabled May Lead to an Unexpected Page
Fault or an Incorrect Page Translation
Problem: If EPT (extended page tables) is enabled, a MOV to CR3 may be followed by an
unexpected page fault or the use of an incorrect page translation.
Implication: Guest software may crash or experience unpredictable behavior as a result of this
erratum.
Workaround: It is possible for the BIOS to contain a workaround for this erratum.
Status: For the affected steppings, see the Summary Tables of Changes.
HSH24 The System May Hang When a C/A Parity Error is Detected
Problem: Due to this erratum, detection of a C/A (Command/Address) parity error by the
memory controller can lead to a system hang.
Implication: System may experience a hang condition in the presence of C/A parity errors.
Workaround: It is possible for the BIOS to contain a workaround for this erratum.
Status: For the affected steppings, see the Summary Tables of Changes.
HSH25 A C/A Parity Error When DDR4 is Operating at 2133 MHz May Result in
Unpredictable System Behavior
Problem: Due to this erratum, when DDR4 is operating at 2133MHz and a C/A (Command/
Address) parity error occurs while exiting a package C-state then unpredictable system
behavior may occur.
Implication: Due to this erratum, the system may experience unpredictable system behavior.
Workaround: A BIOS code change has been identified and may be implemented as a workaround for
this erratum.
Status: For the affected steppings, see the Summary Tables of Changes.