User Manual

Specification Update 13
HSH11 CPUID Extended Topology Enumeration Leaf May Indicate an
Incorrect Number of Logical Processors
Problem: The Extended Topology Enumeration Leaf of CPUID (EAX = 0xB) may return an
incorrect value in EBX[15:0] for the core level type (ECX[15:8] = 2). In this instance,
the number of logical processors at the core level reported in EBX[15:0] should reflect
the configuration as shipped by Intel.
Implication: Software that uses the referenced CPUID function may not properly initialize all logical
processors in the system or correctly report the actual number of factory-configured
logical processors.
Workaround: It is possible for the BIOS to contain a workaround for this erratum.
Status: For the affected steppings, see the Summary Tables of Changes.
HSH12 Intel QPI Link Re-training After a Warm Reset or L1 Exit May be
Unsuccessful
Problem: After a warm reset or an L1 exit, the Intel® QPI (Intel QuickPath Interconnect) links
may not train successfully.
Implication: A failed Intel QPI link can lead to reduced system performance or an inoperable
system.
Workaround: It is possible for the BIOS to contain a workaround for this erratum.
Status: For the affected steppings, see the Summary Tables of Changes.
HSH13 VCCIN VR Phase Shedding is Disabled
Problem: Due to this erratum, the processor does not direct the VCCIN VR (voltage regulator) to
shed phases during low power states.
Implication: Platform power consumption may exceed expected levels during deep package C-
states.
Workaround: It is possible for the BIOS to contain a workaround for this erratum.
Status: For the affected steppings, see the Summary Tables of Changes.
HSH14 Possible Non-Optimal Electrical Margins on The DDR Command Bus
Problem: The processor periodically adjusts drive strength for DDR signals to optimize electrical
margins. Due to this erratum, the drive strength on the DDR command bus may be
incorrectly adjusted.
Implication: Reduced electrical margins on the command bus can lead to higher error rates possibly
affecting system stability.
Workaround: A BIOS code change has been identified and may be implemented as a workaround for
this erratum.
Status: For the affected steppings, see the Summary Tables of Changes.
HSH15 PECI Commands During Reset May Result in Persistent Timeout
Response
Problem: Due to this erratum, a PECI (Platform Environment Control Interface) command other
than GetDIB(), Ping(), or GetTemp() received before RESET_N is de-asserted may
result in a timeout (0x81 completion code) for all subsequent such commands.
Implication: Future PECI commands other than GetDIB(), Ping(), and GetTemp() will not be
serviced after this erratum occurs.
Workaround: It is possible for the BIOS to contain a workaround for this erratum.
Status: For the affected steppings, see the Summary Tables of Changes.