Specification Sheet

Datasheet, Volume 2 of 2 115
Processor Graphics Registers
4.13 Subsystem Vendor Identification (SVID2)—Offset
2Ch
This register is used to uniquely identify the subsystem where the PCI device resides.
Access Method
Default: 0h
Bit
Range
Default &
Access
Field Name (ID): Description
31:16
0h
RO
Reserved (RSVD): Reserved.
15:6
0h
RW
IOBASE: Set by the OS, these bits correspond to address signals [15:6].
Note: This field is RO 0s if DEV2CTL[0] IOBARDIS is 1b.
5:3
0h
RO
Reserved (RSVD): Reserved.
2:1
0h
RO
MEMTYPE: Hardwired to 0s to indicate 32-bit address.
0
1h
RO
MIOS: Hardwired to “1” to indicate IO space.
Note: This field is RO 0s if DEV2CTL[0] IOBARDIS is 1b.
Type: CFG
(Size: 16 bits)
Offset: [B:0, D:2, F:0] + 2Ch
15 12 8 4 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
SUBVID
Bit
Range
Default &
Access
Field Name (ID): Description
15:0
0h
RW_O
SUBVID: This value is used to identify the vendor of the subsystem. This register
should be programmed by BIOS during boot-up. Once written, this register becomes
Read_Only. This register can only be cleared by a Reset.