Specification Sheet
Processor Graphics Registers
112 Datasheet, Volume 2 of 2
4.10 Graphics Translation Table, Memory Mapped
Range Address (GTTMMADR)—Offset 10h
This register requests allocation for the combined Graphics Translation Table
Modification Range and Memory Mapped Range. The range requires 16 MB combined
for MMIO and Global GTT aperture, with 2MB of that used by MMIO and 8MB used by
GTT. GTTADR will begin at (GTTMMADR + 8 MB) while the MMIO base address will be
the same as GTTMMADR. The region between (GTTMMADR + 2MB) - (GTTMMADR +
8MB) is reserved.
For the Global GTT, this range is defined as a memory BAR in graphics device config
space. It is an alias into which software is required to write Page Table Entry values
(PTEs). Software may read PTE values from the global Graphics Translation Table
(GTT). PTEs cannot be written directly into the global GTT memory area.
The device snoops writes to this region in order to invalidate any cached translations
within the various TLBs implemented on-chip.
The allocation is for 16 MB and the base address is defined by bits [38:24].
Access Method
Default: 4h
Bit
Range
Default &
Access
Field Name (ID): Description
7
0h
RO
MFUNC: Indicates if the device is a Multi-Function Device. The Value of this register is
hardwired to 0, indicating the processor graphics is a single function.
6:0
0h
RO
H: This is a 7-bit value that indicates the Header Code for the Processor Graphics. This
code has the value 00h, indicating a type 0 configuration space format.
Type: CFG
(Size: 64 bits)
Offset: [B:0, D:2, F:0] + 10h
6
3
6
0
5
6
5
2
4
8
4
4
4
0
3
6
3
2
2
8
2
4
2
0
1
6
1
2
8
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
RSVDRW
MBA
ADM
PREFMEM
MEMTYP
MIOS
Bit
Range
Default &
Access
Field Name (ID): Description
63:39
0h
RW
RSVDRW: should be set to 0 since addressing above 512 GB is not supported.
38:24
0h
RW
MBA: Set by the OS, these bits correspond to address signals [38:24]. 16MB
combined for MMIO and Global GTT table aperture (2 MB for MMIO, 6 MB reserved and
8 MB for GTT).
23:4
0h
RO
ADM: Hardwired to 0s to indicate at least 16MB address range.