Specification Sheet
Datasheet, Volume 2 of 2 97
Host Bridge/DRAM Registers
3.38 Scratchpad Data (SKPD)—Offset DCh
This register holds 32 writable bits with no functionality behind them. It is for the
convenience of BIOS and graphics drivers.
Access Method
Default: 0h
3.39 Capabilities A (CAPID0)—Offset E4h
Control of bits in this register are only required for customer visible SKU differentiation.
Access Method
Default: 0h
Type: CFG
(Size: 32 bits)
Offset: [B:0, D:0, F:0] + DCh
3
1
2
8
2
4
2
0
1
6
1
2
8
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SKPD
Bit
Range
Default &
Access
Field Name (ID): Description
31:0
0h
RW
SKPD: 1 DWORD of data storage.
Type: CFG
(Size: 32 bits)
Offset: [B:0, D:0, F:0] + E4h
3
1
2
8
2
4
2
0
1
6
1
2
8
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RSVD
ECCDIS
RSVD
VTDD
RSVD
DDPCD
X2APIC_EN
PDCD
RSVD