Specification Sheet

Host Bridge/DRAM Registers
94 Datasheet, Volume 2 of 2
3.35 Base of GTT stolen Memory (BGSM)—Offset B4h
This register contains the base address of stolen DRAM memory for the GTT. BIOS
determines the base of GTT stolen memory by subtracting the GTT graphics stolen
memory size (PCI Device 0 offset 52 bits 9:8) from the Graphics Base of Data Stolen
Memory (PCI Device 0 offset B0 bits 31:20).
Access Method
Default: 100000h
Bit
Range
Default &
Access
Field Name (ID): Description
31:20
0h
RW_L
BDSM: This register contains bits 31 to 20 of the base address of stolen DRAM
memory. BIOS determines the base of graphics stolen memory by subtracting the
graphics stolen memory size (PCI Device 0 offset 50 bits 15:8) from TOLUD (PCI
Device 0 offset BC bits 31:20).
19:1
0h
RO
Reserved (RSVD): Reserved.
0
0h
RW_KL
LOCK: This bit will lock all writeable settings in this register, including itself.
Type: CFG
(Size: 32 bits)
Offset: [B:0, D:0, F:0] + B4h
3
1
2
8
2
4
2
0
1
6
1
2
8 4 0
0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
BGSM
RSVD
LOCK
Bit
Range
Default &
Access
Field Name (ID): Description
31:20
1h
RW_L
BGSM: This register contains the base address of stolen DRAM memory for the GTT.
BIOS determines the base of GTT stolen memory by subtracting the GTT graphics
stolen memory size (PCI Device 0 offset 50 bits 7:6) from the Graphics Base of Data
Stolen Memory (PCI Device 0 offset B0 bits 31:20).
19:1
0h
RO
Reserved (RSVD): Reserved.
0
0h
RW_KL
LOCK: This bit will lock all writeable settings in this register, including itself.