Specification Sheet
Host Bridge/DRAM Registers
92 Datasheet, Volume 2 of 2
3.32 Top of Memory (TOM)—Offset A0h
This Register contains the size of physical memory. BIOS determines the memory size
reported to the OS using this Register.
Access Method
Default: 7FFFF00000h
3.33 Top of Upper Usable DRAM (TOUUD)—Offset A8h
This 64 bit register defines the Top of Upper Usable DRAM.
Configuration software should set this value to TOM minus all ME stolen memory if
reclaim is disabled. If reclaim is enabled, this value should be set to reclaim limit +
1byte, 1MB aligned, since reclaim limit is 1MB aligned. Address bits 19:0 are assumed
to be 000_0000h for the purposes of address comparison. The Host interface positively
decodes an address towards DRAM if the incoming address is less than the value
programmed in this register and greater than or equal to 4GB.
BIOS Restriction: Minimum value for TOUUD is 4GB.
These bits are Intel TXT lockable.
Access Method
Default: 0h
Type: CFG
(Size: 64 bits)
Offset: [B:0, D:0, F:0] + A0h
6
3
6
0
5
6
5
2
4
8
4
4
4
0
3
6
3
2
2
8
2
4
2
0
1
6
1
2
8
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RSVD
TOM
RSVD
LOCK
Bit
Range
Default &
Access
Field Name (ID): Description
63:39
0h
RO
Reserved (RSVD): Reserved.
38:20
7FFFFh
RW_L
TOM: This register reflects the total amount of populated physical memory. This is
NOT necessarily the highest main memory address (holes may exist in main memory
address map due to addresses allocated for memory mapped IO). These bits
correspond to address bits 38:20 (1MB granularity). Bits 19:0 are assumed to be 0. All
the bits in this register are locked in Intel TXT mode.
19:1
0h
RO
Reserved (RSVD): Reserved.
0
0h
RW_KL
LOCK: This bit will lock all writeable settings in this register, including itself.
Type: CFG
(Size: 64 bits)
Offset: [B:0, D:0, F:0] + A8h