Specification Sheet

Host Bridge/DRAM Registers
64 Datasheet, Volume 2 of 2
3.7 Header Type (HDR)—Offset Eh
This register identifies the header layout of the configuration space. No physical
register exists at this location.
Access Method
Default: 0h
Bit
Range
Default &
Access
Field Name (ID): Description
23:16
6h
RO
BCC: Base Class Code: This is an 8-bit value that indicates the base class code for the
Host Bridge device. This code has the value 06h, indicating a Bridge device.
15:8
0h
RO
SUBCC: Sub-Class Code: This is an 8-bit value that indicates the category of Bridge
into which the Host Bridge device falls. The code is 00h indicating a Host Bridge.
7:0
0h
RO
PI: Programming Interface: This is an 8-bit value that indicates the programming
interface of this device. This value does not specify a particular register set layout and
provides no practical use for this device.
Type: CFG
(Size: 8 bits)
Offset: [B:0, D:0, F:0] + Eh
7 4 0
0 0 0 0 0 0 0 0
HDR
Bit
Range
Default &
Access
Field Name (ID): Description
7:0
0h
RO
HDR: PCI Header: This field always returns 0 to indicate that the Host Bridge is a
single function device with standard header layout. Reads and writes to this location
have no effect.