Specification Sheet

Datasheet, Volume 2 of 2 543
GTTMMADR Registers
Bit
Range
Default &
Access
Field Name (ID): Description
31:20
0h
RO_V
PCMBASE: Sizes supported in the processor: 1M, 2M, 4M and 8M. Base value
programmed (from Top of Stolen Memory) itself defines the size of the WOPCM.
Separate WOPCM size programming is redundant information and not required.
Default 1M size programming. 4M recommended for the processor. This register is
locked (becomes read-only) when PAVPE = 1b.
19:7
0h
RO_V
RSVD2: These bits are reserved for future use.
6
0h
RO_V
ASMFEN: ASMF method enabled
0b Disabled (default).
1b Enabled.
This register is locked when PAVPLCK is set.
5
0h
RO_V
RSVD1: These bits are reserved for future use.
4
0h
RO_V
OVTATTACK: Override of Unsolicited Connection State Attack and Terminate.
0: Disable Override. Attack Terminate allowed.
1: Enable Override. Attack Terminate disallowed.
This register bit is locked when PAVPE is set.
3
0h
RO_V
HVYMODSEL: This bit is applicable only for PAVP2 operation mode. This bit is also
applicable for PAVP3 mode only if the per-App memory config is disabled due to the
clearing of bit 9 in the CryptoFunction Control_1 register (address 0x320F0).
0: Lite Mode (Non-Serpent mode)
1: Serpent Mode
For enabled PAVP3 mode, this one type boot time programming has been replaced by
per-App programming (through the Media Crypto Copy command). Note that PAVP2 or
PAVP3 mode selection is done by programming bit 8 of the MFX_MODE - Video Mode
register.
2
0h
RO_V
PAVPLCK: This bit locks all writeable contents in this register when set (including
itself). Only a hardware reset can unlock the register again. This lock bit needs to be
set only if PAVP is enabled (bit 1 of this register is asserted).
1
0h
RO_V
PAVPE:
0: PAVP functionality is disabled.
1: PAVP functionality is enabled.
This register is locked when PAVPLCK is set.
0
0h
RO_V
PCME: This field enables Protected Content Memory within Graphics Stolen Memory.
This memory is the same as the WOPCM area, whose size is defined by bit 5 of this
register. This register is locked when PAVPLOCK is set. A value of 0 in this field
indicates that Protected Content Memory is disabled, and cannot be programmed in
this manner when PAVP is enabled. A value of 1 in this field indicates that Protected
Content Memory is enabled, and is the only programming option available when PAVP
is enabled. (Note that the processor legacy Lite mode programming of PCME bit = 0 is
not supported. For non-PAVP3 Mode, even for Lite mode configuration, this bit should
be programmed to 1 and HVYMODESEL = 0). This bit should always be programmed
to 1 if bits 1 and 2 (PAVPE and PAVP lock bits) are both set. With per-App Memory
configuration support, the range check for the WOPCM memory area should always
happen when this bit is set, regardless of Lite or Serpent mode, or PAVP2 or PAVP3
mode programming.