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Specification Sheet

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GTTMMADR Registers
542 Datasheet, Volume 2 of 2
15.10 Protected Audio Video Path Control (MPAVPC)—
Offset 1082C0h
All the bits in this register are locked by Intel TXT. When locked the R/W bits are RO.
Access Method
Default: 0h
6
3
6
0
5
6
5
2
4
8
4
4
4
0
3
6
3
2
2
8
2
4
2
0
1
6
1
2
8
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RSVD
PHML
RSVD
Bit
Range
Default &
Access
Field Name (ID): Description
63:39
0h
RO
Reserved (RSVD): Reserved.
38:20
0h
RO_V
PHML: This register specifies the last host physical address of the DMA-protected
high-memory region in system memory.
Hardware ignores and does not implement bits 63:HAW, where HAW is the host
address width.
19:0
0h
RO
Reserved (RSVD): Reserved.
Type: MEM
(Size: 32 bits)
Offset: [B:0, D:2, F:0] + 1082C0h
3
1
2
8
2
4
2
0
1
6
1
2
8
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PCMBASE
RSVD2
ASMFEN
RSVD1
OVTATTACK
HVYMODSEL
PAVPLCK
PAVPE
PCME