Specification Sheet
GTTMMADR Registers
534 Datasheet, Volume 2 of 2
Access Method
Default: 100000h
15.2 Top of Upper Usable DRAM (MTOUUD)—Offset
108080h
This 64 bit register defines the Top of Upper Usable DRAM.
Configuration software should set this value to TOM minus all ME stolen memory if
reclaim is disabled. If reclaim is enabled, this value should be set to reclaim limit +
1byte, 1MB aligned, since reclaim limit is 1MB aligned. Address bits 19:0 are assumed
to be 000_0000h for the purposes of address comparison. The Host interface positively
decodes an address towards DRAM if the incoming address is less than the value
programmed in this register and greater than or equal to 4GB.
BIOS Restriction: Minimum value for TOUUD is 4GB.
These bits are Intel TXT lockable.
Type: MEM
(Size: 32 bits)
Offset: [B:0, D:2, F:0] + 108000h
3
1
2
8
2
4
2
0
1
6
1
2
8
4
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TOLUD
RSVD
LOCK
Bit
Range
Default &
Access
Field Name (ID): Description
31:20
1h
RO_V
TOLUD: This register contains bits 31 to 20 of an address one byte above the
maximum DRAM memory below 4G that is usable by the operating system. Address
bits 31 down to 20 programmed to 01h implies a minimum memory size of 1MB.
Configuration software should set this value to the smaller of the following 2 choices:
maximum amount memory in the system minus ME stolen memory plus one byte or
the minimum address allocated for PCI memory. Address bits 19:0 are assumed to be
0_0000h for the purposes of address comparison. The Host interface positively
decodes an address towards DRAM if the incoming address is less than the value
programmed in this register.
The Top of Low Usable DRAM is the lowest address above both Graphics Stolen
memory and Tseg. BIOS determines the base of Graphics Stolen Memory by
subtracting the Graphics Stolen Memory Size from TOLUD and further decrements by
Tseg size to determine base of Tseg. All the Bits in this register are locked in Intel TXT
mode.
This register should be 1MB aligned when reclaim is enabled.
19:1
0h
RO
Reserved (RSVD): Reserved.
0
0h
RO_V
LOCK: This bit will lock all writeable settings in this register, including itself.