Specification Sheet

Host Bridge/DRAM Registers
60 Datasheet, Volume 2 of 2
3.2 Device Identification (DID)—Offset 2h
This register combined with the Vendor Identification register uniquely identifies any
PCI device.
Access Method
Default: 59XXh
3.3 PCI Command (PCICMD)—Offset 4h
Since Device #0 does not physically reside on PCI_A many of the bits are not
implemented.
Access Method
Default: 6h
Type: CFG
(Size: 16 bits)
Offset: [B:0, D:0, F:0] + 2h
15 12 8 4 0
0 1 0 1 1 0 0 1 X X X X X X X X
DID_MSB
DID_SKU
Bit
Range
Default &
Access
Field Name (ID): Description
15:8
59h
RO
DID_MSB: Device Identification Number MSB: This is the upper part of device
identification assigned to the processor.
7:0
XXh
ROV
DID_SKU: Device Identification Number SKU: This is the lower part of device
identification assigned to the processor.
Type: CFG
(Size: 16 bits)
Offset: [B:0, D:0, F:0] + 4h
15 12 8 4 0
0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0
RSVD
FB2B
SERRE
ADSTEP
PERRE
VGASNOOP
MWIE
SCE
BME
MAE
IOAE