Specification Sheet
PCI Express* Controller (x4) Registers
496 Datasheet, Volume 2 of 2
14.26 Power Management Control/Status (PM)—Offset
84h
Access Method
Default: 8h
Type: CFG
(Size: 32 bits)
Offset: [B:0, D:1, F:2] + 84h
3
1
2
8
2
4
2
0
1
6
1
2
8
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
RSVD
PMESTS
DSCALE
DSEL
PMEE
RSVD
NSR
RSVD
PS
Bit
Range
Default &
Access
Field Name (ID): Description
31:16
0h
RO
Reserved (RSVD): Reserved.
15
0h
RO
PMESTS: PME Status: Indicates that this device does not support PMEB generation
from D3cold.
14:13
0h
RO
DSCALE: Data Scale: Indicates that this device does not support the power
management data register.
12:9
0h
RO
DSEL: Data Select: Indicates that this device does not support the power
management data register.
8
0h
RW
PMEE: PME Enable: Indicates that this device does not generate PMEB assertion from
any D-state.
0: PMEB generation not possible from any D State
1: PMEB generation enabled from any D State
The setting of this bit has no effect on hardware. See PM_CAP[15:11]
7:4
0h
RO
Reserved (RSVD): Reserved.