Specification Sheet

Datasheet, Volume 2 of 2 59
Host Bridge/DRAM Registers
3.1 Vendor Identification (VID)—Offset 0h
This register combined with the Device Identification register uniquely identifies any
PCI device.
Access Method
Default: 8086h
B8–BBh 4 TSEG Memory Base (TSEGMB)—Offset B8h 0h
BC–BFh 4 Top of Low Usable DRAM (TOLUD)—Offset BCh 100000h
DC–DFh 4 Scratchpad Data (SKPD)—Offset DCh 0h
E4–E7h 4 Capabilities A (CAPID0)—Offset E4h 0h
E8–EBh 4 Capabilities B (CAPID0)—Offset E8h 0h
EC–EFh 4 Capabilities C (CAPID0)—Offset ECh 0h
Table 3-1. Summary of Bus: 0, Device: 0, Function: 0 (CFG) (Continued)
Offset
Size
(Bytes)
Register Name (Register Symbol) Default Value
Type: CFG
(Size: 16 bits)
Offset: [B:0, D:0, F:0] + 0h
15 12 8 4 0
1 0 0 0 0 0 0 0 1 0 0 0 0 1 1 0
VID
Bit
Range
Default &
Access
Field Name (ID): Description
15:0
8086h
RO
VID: Vendor Identification Number: PCI standard identification for Intel.