Specification Sheet

PCI Express* Controller (x8) Registers
468 Datasheet, Volume 2 of 2
13.55 VC0 Resource Status (VC0RSTS)—Offset 11Ah
Reports the Virtual Channel specific status.
Access Method
Default: 2h
Bit
Range
Default &
Access
Field Name (ID): Description
31
1h
RO
VC0E: VC0 Enable: For VC0 this is hardwired to 1 and read only as VC0 can never be
disabled.
30:27
0h
RO
Reserved (RSVD): Reserved.
26:24
0h
RO
VC0ID: VC0 ID: Assigns a VC ID to the VC resource. For VC0 this is hardwired to 0
and read only.
23:20
0h
RO
Reserved (RSVD): Reserved.
19:17
0h
RW
PAS: Port Arbitration Select: Port Arbitration Select - This field configures the VC
resource to provide a particular Port Arbitration service. This field is valid for RCRBs,
Root Ports that support peer to peer traffic, and Switch Ports, but not for PCI Express
Endpoint devices or Root Ports that do not support peer to peer traffic.
The permissible value of this field is a number corresponding to one of the asserted
bits in the Port Arbitration Capability field of the VC resource.
This field does not affect the root port behavior.
16
0h
RO
Reserved (RSVD): Reserved.
15:8
0h
RW
TCHVC0M: TC High VC0 Map: Allow usage of high order TCs.
BIOS should keep this field zeroed to allow usage of the reserved TC[3] for other
purposes
7:1
7Fh
RW
TCVC0M: TC/VC0 Map: Indicates the TCs (Traffic Classes) that are mapped to the VC
resource. Bit locations within this field correspond to TC values. For example, when bit
7 is set in this field, TC7 is mapped to this VC resource. When more than one bit in this
field is set, it indicates that multiple TCs are mapped to the VC resource. In order to
remove one or more TCs from the TC/VC Map of an enabled VC, software should
ensure that no new or outstanding transactions with the TC labels are targeted at the
given Link.
0
1h
RO
TC0VC0M: TC0/VC0 Map: Traffic Class 0 is always routed to VC0.
Type: CFG
(Size: 16 bits)
Offset: [B:0, D:1, F:1] + 11Ah
15 12 8 4 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
RSVD
VC0NP
RSVD