Specification Sheet

PCI Express* Controller (x8) Registers
462 Datasheet, Volume 2 of 2
Bit
Range
Default &
Access
Field Name (ID): Description
15:12
0h
RWS
ComplianceDeemphasis: Compliance De-emphasis:
For 8 GT/s Data Rate: This field sets the Transmitter Preset level in Polling.Compliance
state if the entry occurred due to the Enter Compliance bit being 1b.
This bit sets the de-emphasis level in Polling.Compliance state if the entry occurred
due to the Enter Compliance bit being 1b.
Defined encodings are:
0001b -3.5 dB
0000b -6 dB
When the Link is operating at 2.5 GT/s, the setting of this bit has no effect.
Components that support only 2.5 GT/s speed are permitted to hardwire this bit to 0b.
For a Multi-Function device associated with an Upstream Port, the bit in Function 0 is
of type RWS, and only Function 0 controls the component's Link behavior. In all other
Functions of that device, this bit is of type RsvdP.
The default value of this bit is 0000b.
This bit is intended for debug, compliance testing purposes. System firmware and
software is allowed to modify this bit only during debug or compliance testing.
11
0h
RWS
compsos: Compliance SOS: When set to 1b, the LTSSM is required to send SKP
Ordered Sets periodically in between the (modified) compliance patterns.
For a Multi-Function device associated with an Upstream Port, the bit in Function 0 is
of type RWS, and only Function 0 controls the component's Link behavior. In all other
Functions of that device, this bit is of type RsvdP.
The default value of this bit is 0b.
This bit is applicable when the Link is operating at 2.5 GT/s or 5 GT/s data rates only
Components that support only the 2.5 GT/s speed are permitted to hardwire this field
to 0b.
10
0h
RWS
entermodcompliance: Enter Modified Compliance: When this bit is set to 1b, the
device transmits modified compliance pattern if the LTSSM enters Polling.Compliance
state.
Components that support only the 2.5GT/s speed are permitted to hardwire this bit to
0b.
Default value of this field is 0b.
9:7
0h
RWS_V
txmargin: Transmit Margin: This field controls the value of the non-deemphasized
voltage level at the Transmitter pins. This field is reset to 000b on entry to the LTSSM
Polling.Configuration substrate (see Chapter 4 for details of how the transmitter
voltage level is determined in various states).
Encodings:
000: Normal operating range
001: 800-1200 mV for full swing and 400-700 mV for half-swing
010 - (n-1): Values should be monotonic with a non-zero slope. The value of n should
be greater than 3 and less than 7. At least two of these should be below the normal
operating range
n : 200-400 mV for full-swing and 100-200 mV for half-swing
n -111: reserved
Default value is 000b.
Components that support only the 2.5GT/s speed are permitted to hardwire this bit to
0b.
When operating in 5GT/s mode with full swing, the deemphasis ratio should be
maintained within +/-1 dB from the specification defined operational value (either -3.5
or -6 dB).
6
0h
RWS
selectabledeemphasis: Selectable De-emphasis: When the Link is operating at 5GT/
s speed, selects the level of de-emphasis. Encodings:
1b -3.5 dB
0b -6 dB
Default value is implementation specific, unless a specific value is required for a
selected form factor or platform.
When the Link is operating at 2.5 GT/s speed, the setting of this bit has no effect.
Components that support only the 2.5GT/s speed are permitted to hardwire this bit to
0b.