Specification Sheet

Datasheet, Volume 2 of 2 367
PCI Express* Controller (x16) Registers
12.11 Subordinate Bus Number (SUBUSN)—Offset 1Ah
This register identifies the subordinate bus (if any) that resides at the level below PCI
Express-G. This number is programmed by the PCI configuration software to allow
mapping of configuration cycles to PCI Express-G.
Access Method
Default: 0h
7 4 0
0 0 0 0 0 0 0 0
BUSN
Bit
Range
Default &
Access
Field Name (ID): Description
7:0
0h
RW
BUSN: Secondary Bus Number: This field is programmed by configuration software
with the bus number assigned to PCI Express-G.
Type: CFG
(Size: 8 bits)
Offset: [B:0, D:1, F:0] + 1Ah
7 4 0
0 0 0 0 0 0 0 0
BUSN
Bit
Range
Default &
Access
Field Name (ID): Description
7:0
0h
RW
BUSN: Subordinate Bus Number: This register is programmed by configuration
software with the number of the highest subordinate bus that lies behind the
processor root port bridge. When only a single PCI device resides on the PCI Express-
G segment, this register will contain the same value as the SBUSN1 register.