Specification Sheet

IMGU Registers
348 Datasheet, Volume 2 of 2
11.11 Subsystem Vendor Identification (SVID)—Offset
2Ch
This value is used to identify the vendor of the subsystem.
Access Method
Default: 0h
Bit
Range
Default &
Access
Field Name (ID): Description
63:39
0h
RW
RSVDRW: should be set to 0 since addressing above 512GB is not supported.
38:22
0h
RW
IMGBA: This field corresponds to bits 38 to 22 of the base address IMGUBAR address
space.
BIOS will program this register resulting in a base address for a 4MB block of
contiguous memory address space.
This register ensures that a naturally aligned 4MB space is allocated within total
addressable memory space.
The IMGU driver uses this base address to program all IMGU (and under HDEV also
CIO2) registers.
21:4
0h
RO
ADM: Hardwired to 0s to indicate at least 4MB address range.
3
0h
RO
PM: Hardwired to 0 to prevent prefetching.
2:1
2h
RO
MT: Hardwired to '10 to indicate 64-bit address.
0
0h
RO
MIOS: Hardwired to 0 to indicate memory space.
Type: CFG
(Size: 16 bits)
Offset: [B:0, D:5, F:0] + 2Ch
15 12 8 4 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
SUBVID
Bit
Range
Default &
Access
Field Name (ID): Description
15:0
0h
RW_O
SUBVID: This field should be programmed during boot-up to indicate the vendor of
the system board. After it has been written once, it becomes read only.