Specification Sheet
Datasheet, Volume 2 of 2 311
VC0PREMAP Registers
10.4 Global Command Register (GCMD)—Offset 18h
Register to control remapping hardware. If multiple control fields in this register need
to be modified, software should serialize the modifications through multiple writes to
this register.
Access Method
Default: 0h
2
0h
RO
DT:
0: Hardware does not support device-IOTLBs.
1: Hardware supports Device-IOTLBs.
Implementations reporting this field as Set should also support Queued Invalidation
(QI).
1
1h
ROV
QI:
0: Hardware does not support queued invalidations.
1: Hardware supports queued invalidations.
0
0h
RO
C: This field indicates if hardware access to the root, context, page-table and
interrupt-remap structures are coherent (snooped) or not.
0: Indicates hardware accesses to remapping structures are non-coherent.
1: Indicates hardware accesses to remapping structures are coherent.
Hardware access to advanced fault log and invalidation queue are always coherent.
Bit
Range
Default &
Access
Field Name (ID): Description
Type: MEM
(Size: 32 bits)
Offset: [B:0, D:0, F:0] + 18h
3
1
2
8
2
4
2
0
1
6
1
2
8
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TE
SRTP
SFL
EAFL
WBF
QIE
IRE
SIRTP
CFI
RSVD