Specification Sheet

Datasheet, Volume 2 of 2 305
VC0PREMAP Registers
10 VC0PREMAP Registers
Table 10-1. Summary of Bus: 0, Device: 0, Function: 0 (MEM)
Offset
Size
(Bytes)
Register Name (Register Symbol) Default Value
0–3h 4 Version Register (VER)—Offset 0h 10h
8–Fh 8 Capability Register (CAP)—Offset 8h D2008C40660462h
10–17h 8 Extended Capability Register (ECAP)—Offset 10h F050DAh
18–1Bh 4 Global Command Register (GCMD)—Offset 18h 0h
1C–1Fh 4 Global Status Register (GSTS)—Offset 1Ch 0h
20–27h 8 Root-Entry Table Address Register (RTADDR)—Offset 20h 0h
28–2Fh 8 Context Command Register (CCMD)—Offset 28h 0h
34–37h 4 Fault Status Register (FSTS)—Offset 34h 0h
38–3Bh 4 Fault Event Control Register (FECTL)—Offset 38h 80000000h
3C–3Fh 4 Fault Event Data Register (FEDATA)—Offset 3Ch 0h
40–43h 4 Fault Event Address Register (FEADDR)—Offset 40h 0h
44–47h 4 Fault Event Upper Address Register (FEUADDR)—Offset 44h 0h
58–5Fh 8 Advanced Fault Log Register (AFLOG)—Offset 58h 0h
64–67h 4 Protected Memory Enable Register (PMEN)—Offset 64h 0h
68–6Bh 4 Protected Low-Memory Base Register (PLMBASE)—Offset 68h 0h
6C–6Fh 4 Protected Low-Memory Limit Register (PLMLIMIT)—Offset 6Ch 0h
70–77h 8 Protected High-Memory Base Register (PHMBASE)—Offset 70h 0h
78–7Fh 8 Protected High-Memory Limit Register (PHMLIMIT)—Offset 78h 0h
80–87h 8 Invalidation Queue Head Register (IQH)—Offset 80h 0h
88–8Fh 8 Invalidation Queue Tail Register (IQT)—Offset 88h 0h
90–97h 8 Invalidation Queue Address Register (IQA)—Offset 90h 0h
9C–9Fh 4 Invalidation Completion Status Register (ICS)—Offset 9Ch 0h
A0–A3h 4 Invalidation Event Control Register (IECTL)—Offset A0h 80000000h
A4–A7h 4 Invalidation Event Data Register (IEDATA)—Offset A4h 0h
A8–ABh 4 Invalidation Event Address Register (IEADDR)—Offset A8h 0h
AC–AFh 4 Invalidation Event Upper Address Register (IEUADDR)—Offset ACh 0h
B8–BFh 8 Interrupt Remapping Table Address Register (IRTA)—Offset B8h 0h
400–407h 8 Fault Recording Low Register (FRCDL)—Offset 400h 0h
408–40Fh 8 Fault Recording High Register (FRCDH)—Offset 408h 0h
500–507h 8 Invalidate Address Register (IVA)—Offset 500h 0h
508–50Fh 8 IOTLB Invalidate Register (IOTLB)—Offset 508h 0h