Specification Sheet

Datasheet, Volume 2 of 2 279
GFXVTBAR Registers
8.10 Fault Event Data Register (FEDATA)—Offset 3Ch
Register specifying the interrupt message data
Access Method
Default: 0h
8.11 Fault Event Address Register (FEADDR)—Offset
40h
Register specifying the interrupt message address.
Access Method
Default: 0h
Type: MEM
(Size: 32 bits)
Offset: [B:0, D:0, F:0] + 3Ch
3
1
2
8
2
4
2
0
1
6
1
2
8 4 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
EIMD
IMD
Bit
Range
Default &
Access
Field Name (ID): Description
31:16
0h
RW
EIMD: This field is valid only for implementations supporting 32-bit interrupt data
fields.
Hardware implementations supporting only 16-bit interrupt data may treat this field as
RsvdZ.
15:0
0h
RW
IMD: Data value in the interrupt request.
Type: MEM
(Size: 32 bits)
Offset: [B:0, D:0, F:0] + 40h
3
1
2
8
2
4
2
0
1
6
1
2
8 4 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
MA
RSVD