Specification Sheet
Datasheet, Volume 2 of 2 233
MCHBAR Registers
7.71 IA—Offset 58FCh
Interface to allow software to determine what is causing resolved frequency to be
clamped below the requested frequency. Status bits are updated by hardware through
the IO interface IO_IA_PERF_LIMIT, log bits are set by HW on a status bit edge
detected and cleared by a SW write of '0'.
Access Method
Default: 0h
Bit
Range
Default &
Access
Field Name (ID): Description
31:0
0h
ROS_V
COUNTS: Counter of the time units within which RAPL was limiting P-states. If
limitation occurred anywhere within the time window of 1/1024 seconds, the count will
be incremented (limitation on accuracy). This data can serve as a proxy for the
potential performance impacts of RAPL on cores performance.
Type: MEM
(Size: 32 bits)
Offset: [B:0, D:0, F:0] + 58FCh
3
1
2
8
2
4
2
0
1
6
1
2
8
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SPARE_IA_15_LOG
SPARE_IA_14_LOG
TURBO_ATTEN_LOG
MAX_TURBO_LIMIT_LOG
PBM_PL2_LOG
PBM_PL1_LOG
SPARE_IA_9_LOG
OTHER_LOG
VR_TDC_LOG
VR_THERMALERT_LOG
RATL_LOG
RSR_LIMIT_LOG
SPARE_IA_3_LOG
SPARE_IA_2_LOG
THERMAL_LOG
PROCHOT_LOG
SPARE_IA_15
SPARE_IA_14
TURBO_ATTEN
MAX_TURBO_LIMIT
PBM_PL2
PBM_PL1
SPARE_IA_9
OTHER
VR_TDC
VR_THERMALERT
RATL
RSR_LIMIT
SPARE_IA_3
SPARE_IA_2
THERMAL
PROCHOT
Bit
Range
Default &
Access
Field Name (ID): Description
31
0h
RW0C
SPARE_IA_15_LOG: Reserved
30
0h
RW0C
SPARE_IA_14_LOG: Reserved
29
0h
RW0C
TURBO_ATTEN_LOG: Turbo attenuation (multi core turbo) Log, RW, When set by
hardware indicates that Turbo attenuation (multi core turbo) has cause IA frequency
clipping. Software should write to this bit to clear the status in this bit
28
0h
RW0C
MAX_TURBO_LIMIT_LOG: Max turbo limit Log, RW, When set by hardware indicates
that Max turbo limit has cause IA frequency clipping. Software should write to this bit
to clear the status in this bit
27
0h
RW0C
PBM_PL2_LOG: PBM PL2, PL3 (pkg, platform) Log, RW, When set by hardware
indicates that PBM PL2 or PL3(package or platform PL2 or PL3) has cause IA frequency
clipping. Software should write to this bit to clear the status in this bit