Specification Sheet

Processor Configuration Register Definitions and Address Ranges
28 Datasheet, Volume 2 of 2
2.2 PCI Devices and Functions
The processor contains PCI devices within a single component. The configuration
registers for the devices are mapped as devices residing on PCI Bus 0.
• Device 0: Host Bridge / DRAM Controller / LLC Controller 0 – Logically this device
appears as a PCI device residing on PCI bus 0. Device 0 contains the standard PCI
header registers, PCI Express base address register, DRAM control (including
thermal/throttling control), configuration for the DMI, and other processor specific
registers.
• Device 2: Processor Graphics – Logically, this device appears as a PCI device
residing on PCI Bus 0. Physically, Device 2 contains the configuration registers for
3D, 2D, and display functions. In addition, Device 2 is located in two separate
physical locations – GT and Display Engine.
• Device 5: Imaging Unit (IMGU) – Logically, this device appears as a PCI device
residing on PCI Bus 0. Physically, Device 5 contains the configuration registers for
the Imaging Unit.
• Device 8: Gaussian Mixture Model Device (GMM) – Logically, this device appears as
a PCI device residing on PCI Bus 0. Physically, Device 8 contains the configuration
registers for the Gaussian Mixture Model Device.
Table 2-2. Register Attribute Modifiers
Attribute
Modifier
Applicable
Attribute
Description
S
RO (w/ -V) Sticky: These bits are only re-initialized to their default value by a "Power Good
Reset".
Note: Does not apply to RO (constant) bits.
RW
RW1C
RW1S
-K RW
Key: These bits control the ability to write other bits (identified with a 'Lock'
modifier)
-L
RW Lock: Hardware can make these bits "Read Only" using a separate configuration
bit or other logic.
Note: Mutually exclusive with 'Once' modifier.
WO
-O
RW Once: After reset, these bits can only be written by software once, after which
they become "Read Only".
Note: Mutually exclusive with 'Lock' modifier and does not make sense with
'Variant' modifier.
WO
-FW RO
Firmware Write: The value of these bits can be updated by firmware (PCU, TAP,
and so on).
-V RO
Variant: The value of these bits can be updated by hardware.
Note: RW1C and RC bits are variant by definition and therefore do not need to be
modified.