Specification Sheet

DMIBAR Registers
164 Datasheet, Volume 2 of 2
6.27 DMI Uncorrectable Error Mask (DMIUEMSK)—
Offset 1C8h
DMI Uncorrectable Error Mask register. This register is for test and debug purposes
only.
Access Method
Default: 0h
Type: MEM
(Size: 32 bits)
Offset: [B:0, D:0, F:0] + 1C8h
3
1
2
8
2
4
2
0
1
6
1
2
8 4 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RSVD
ECCERRM
RSVD
UREM
RSVD
MTLPM
ROM
UCM
RSVD
CPLTM
RSVD
PTLPM
RSVD
DLPEM
RSVD
Bit
Range
Default &
Access
Field Name (ID): Description
31:23
0h
RO
Reserved (RSVD): Reserved.
22
0h
RWS
ECCERRM: 2 Bit Error Mask:
21
0h
RO
Reserved (RSVD): Reserved.
20
0h
RWS
UREM: Unsupported Request Error Mask:
19
0h
RO
Reserved (RSVD): Reserved.
18
0h
RWS
MTLPM: Malformed TLP Mask:
17
0h
RWS
ROM: Receiver Overflow Mask:
16
0h
RWS
UCM: Unexpected Completion Mask:
15
0h
RO
Reserved (RSVD): Reserved.
14
0h
RWS
CPLTM: Completion Timeout Mask:
13
0h
RO
Reserved (RSVD): Reserved.
12
0h
RWS
PTLPM: Poisoned TLP Mask: