Specification Sheet

Datasheet, Volume 2 of 2 141
DMIBAR Registers
6.4 DMI Port VC Control (DMIPVCCTL)—Offset Ch
Access Method
Default: 0h
Bit
Range
Default &
Access
Field Name (ID): Description
31:24
0h
RO
VCATO: Reserved for VC Arbitration Table Offset:
23:8
0h
RO
Reserved (RSVD): Reserved.
7:0
0h
RO
VCAC: Reserved for VC Arbitration Capability:
Type: MEM
(Size: 16 bits)
Offset: [B:0, D:0, F:0] + Ch
15 12 8 4 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RSVD
VCAS
LVCAT
Bit
Range
Default &
Access
Field Name (ID): Description
15:4
0h
RO
Reserved (RSVD): Reserved.
3:1
0h
RW
VCAS: VC Arbitration Select: This field will be programmed by software to the only
possible value as indicated in the VC Arbitration Capability field.
The value 000b when written to this field will indicate the VC arbitration scheme is
hardware fixed (in the root complex). This field cannot be modified when more than
one VC in the LPVC group is enabled.
000:Hardware fixed arbitration scheme. E.G. Round Robin
Others:Reserved
See the PCI express specification for more details.
0
0h
RO
LVCAT: Reserved for Load VC Arbitration Table: