Specification Sheet

Dynamic Power Performance Management (DPPM) Registers
134 Datasheet, Volume 2 of 2
5.2 Capabilities A (CAPID0)—Offset E4h
Control of bits in this register are only required for customer visible SKU differentiation.
Access Method
Default: 0h
13
0h
RO_V
D6EN: Reserved (RSVD):
12:11
0h
RO
Reserved (RSVD): Reserved.
10
1h
RO_V
D5EN:
0: Bus 0 Device 5 is disabled and not visible.
1: Bus 0 Device 5 is enabled and visible.
This bit will be set to 0b and remain 0b if Device 5 capability is disabled.
9:8
0h
RO
Reserved (RSVD): Reserved.
7
1h
RO_V
D4EN:
0: Bus 0 Device 4 is disabled and not visible.
1: Bus 0 Device 4 is enabled and visible.
This bit will be set to 0b and remain 0b if Device 4 capability is disabled.
6
0h
RO
Reserved (RSVD): Reserved.
5
1h
RO_V
D3EN:
0: Bus 0 Device 3 is disabled and hidden
1: Bus 0 Device 3 is enabled and visible
This bit will be set to 0b and remain 0b if Device 3 capability is disabled.
4
1h
RO_V
D2EN:
0: Bus 0 Device 2 is disabled and hidden
1: Bus 0 Device 2 is enabled and visible
This bit will be set to 0b and remain 0b if Device 2 capability is disabled.
3
1h
RO_V
D1F0EN:
0: Bus 0 Device 1 Function 0 is disabled and hidden.
1: Bus 0 Device 1 Function 0 is enabled and visible.
This bit will be set to 0b and remain 0b if PEG10 capability is disabled.
2
1h
RO_V
D1F1EN:
0: Bus 0 Device 1 Function 1 is disabled and hidden.
1: Bus 0 Device 1 Function 1 is enabled and visible.
This bit will be set to 0b and remain 0b if:
- PEG11 capability is disabled by fuses, OR
- PEG11 is disabled by strap (PEG0CFGSEL)
1
1h
RO_V
D1F2EN:
0: Bus 0 Device 1 Function 2 is disabled and hidden.
1: Bus 0 Device 1 Function 2 is enabled and visible.
This bit will be set to 0b and remain 0b if:
- PEG12 capability is disabled by fuses, OR
- PEG12 is disabled by strap (PEG0CFGSEL)
0
1h
RO
D0EN: Bus 0 Device 0 Function 0 may not be disabled and is therefore hardwired to 1.
Bit
Range
Default &
Access
Field Name (ID): Description
Type: CFG
(Size: 32 bits)
Offset: [B:0, D:4, F:0] + E4h