Specification Sheet
Datasheet, Volume 2 of 2 129
Processor Graphics Registers
4.29 Message Address (MA)—Offset B0h
This register contains the Message Address for MSIs sent by the device.
Access Method
Default: 0h
4.30 Message Data (MD)—Offset B4h
This register contains the Message Data for MSIs sent by the device.
Access Method
Default: 0h
Type: CFG
(Size: 32 bits)
Offset: [B:0, D:2, F:0] + B0h
3
1
2
8
2
4
2
0
1
6
1
2
8
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
MESSADD
FDWORD
Bit
Range
Default &
Access
Field Name (ID): Description
31:2
0h
RW
MESSADD: Used by system software to assign an MSI address to the device.
The device handles an MSI by writing the padded contents of the MD register to this
address.
1:0
0h
RO
FDWORD: Hardwired to 0 so that addresses assigned by system software are always
aligned on a DWORD address boundary.
Type: CFG
(Size: 16 bits)
Offset: [B:0, D:2, F:0] + B4h
15 12 8 4 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
MESSDATA