User Guide

Interfaces
30 Datasheet, Volume 1 of 2
• Full RX Equalization and acquisition for: AGC (Adaptive Gain Control), CDR (Clock
and Data Recovery), adaptive DFE (decision feedback equalizer) and adaptive CTLE
peaking (continuous time linear equalizer).
• Full adaptive phase 3 EQ compliant with PCI Express* Gen 3 specification
See the PCI Express* Base Specification 3.0 for details on PCI Express* equalization.
2.3 Direct Media Interface (DMI)
Direct Media Interface (DMI) connects the processor and the PCH.
Main characteristics:
• 4 lanes Gen 3 DMI support
• 8 GT/s point-to-point DMI interface to PCH
• DC coupling - no capacitors between the processor and the PCH
• PCH end-to-end lane reversal across the link
• Half-Swing support (low-power/low-voltage)
Note: Only DMI x4 configuration is supported.
Note: Polarity Inversion and Lane Reversal on DMI Link are not allowed.
2.3.1 DMI Error Flow
DMI can only generate SERR in response to errors; never SCI, SMI, MSI, PCI INT, or
GPE. Any DMI related SERR activity is associated with Device 0.
2.3.2 DMI Link Down
The DMI link going down is a fatal, unrecoverable error. If the DMI data link goes to
data link down, after the link was up, then the DMI link hangs the system by not
allowing the link to retrain to prevent data corruption. This link behavior is controlled
by the PCH.
Downstream transactions that had been successfully transmitted across the link prior
to the link going down may be processed as normal. No completions from downstream,
non-posted transactions are returned upstream over the DMI link after a link down
event.
2.4 Processor Graphics
The processor graphics is based on Gen 9 LP (generation 9 Low Power) graphics core
architecture that enables substantial gains in performance and lower-power
consumption over prior generations.
The processor graphics architecture delivers high dynamic range of scaling to address
segments spanning low power to high power, increased performance per watt, support
for next generation of APIs. Gen 9 LP scalable architecture is partitioned by usage
domains along Render/Geometry, Media, and Display. The architecture also delivers
very low-power video playback and next generation analytic and filters for imaging-
related applications. The new Graphics Architecture includes 3D compute elements,