User Guide

Interfaces
22 Datasheet, Volume 1 of 2
2.1.2 System Memory Timing Support
The IMC supports the following DDR Speed Bin, CAS Write Latency (CWL), and
command signal mode timings on the main memory interface:
• tCL = CAS Latency
• tRCD = Activate Command to READ or WRITE Command delay
• tRP = PRECHARGE Command Period
• CWL = CAS Write Latency
•Command Signal modes:
— 1N indicates a new DDR3L/DDR4 command may be issued every clock
— 2N indicates a new DDR3L/DDR4 command may be issued every 2 clocks
2.1.3 System Memory Organization Modes
The IMC supports two memory organization modes, single-channel and dual-channel.
Depending upon how the DDR Schema and DIMM Modules are populated in each
memory channel, a number of different configurations can exist.
Single-Channel Mode
In this mode, all memory cycles are directed to a single channel. Single-Channel mode
is used when either the Channel A or Channel B DIMM connectors are populated in any
order, but not both.
Dual-Channel Mode – Intel
®
Flex Memory Technology Mode
The IMC supports Intel Flex Memory Technology Mode. Memory is divided into a
symmetric and asymmetric zone. The symmetric zone starts at the lowest address in
each channel and is contiguous until the asymmetric zone begins or until the top
H 8GB 4Gb 512M x 8 18 2 15/10 16 8K
H 16GB 8Gb 1024M x 8 18 2 16/10 16 8K
Table 2-8. Supported DDR4 ECC SODIMM Module Configurations (S-Processor Lines)
(Sheet 2 of 2)
Raw
Card
Version
DIMM
Capacity
DRAM
Device
Technology
DRAM
Organization
# of
DRAM
Devices
# of
Ranks
# of
Row/Col
Address
Bits
# of
Banks
Inside
DRAM
Page
Size
Table 2-9. DRAM System Memory Timing Support
DRAM
Device
Transfer
Rate (MT/s)
tCL (tCK)
tRCD
(tCK)
tRP (tCK) CWL (tCK)
DPC
(SODIMM
Only)
CMD
Mode
DDR3L/-RS
1333 8/9 8/9 8/9 7 1 or 2 1N/2N
1600 10/11 10/11 10/11 8 1 or 2 1N/2N
DDR4 2133 15/16 14/15/16 15/16 11/14/14 1 or 2 1N/2N
DDR4 2400 17 17 17 12/16/16 1 or 2 1N/2N