User Guide

Introduction
16 Datasheet, Volume 1 of 2
eDP* embedded DisplayPort*
EU Execution Unit in the Processor Graphics
GSA Graphics in System Agent
HDCP High-bandwidth Digital Content Protection
HDMI* High Definition Multimedia Interface
IMC Integrated Memory Controller
Intel
®
64 Technology 64-bit memory extensions to the IA-32 architecture
Intel
®
DPST Intel Display Power Saving Technology
Intel
®
PTT Intel Platform Trust Technology
Intel
®
TSX-NI Intel Transactional Synchronization Extensions
Intel
®
TXT Intel Trusted Execution Technology
Intel
®
VT
Intel Virtualization Technology. Processor virtualization, when used in conjunction
with Virtual Machine Monitor software, enables multiple, robust independent
software environments inside a single platform.
Intel
®
VT-d
Intel Virtualization Technology (Intel VT) for Directed I/O. Intel VT-d is a hardware
assist, under system software (Virtual Machine Manager or OS) control, for enabling
I/O device virtualization. Intel VT-d also brings robust security by providing
protection from errant DMAs by using DMA remapping, a key feature of Intel VT-d.
IOV I/O Virtualization
ISP Image Signal Processor
LFM
Low Frequency Mode. corresponding to the Enhanced Intel SpeedStep
®
Technology’s lowest voltage/frequency pair. It can be read at MSR CEh [47:40].
LLC Last Level Cache
LPDDR3 Low Power Third-generation Double Data Rate SDRAM memory technology
LPM
Low-Power Mode.The LPM Frequency is less than or equal to the LFM Frequency. The
LPM TDP is lower than the LFM TDP as the LPM configuration limits the processor to
single thread operation
LPSP Low-Power Single Pipe
LSF
Lowest Supported Frequency.This frequency is the lowest frequency where
manufacturing confirms logical functionality under the set of operating conditions.
MCP Multi Chip Package - includes the processor and the PCH.
MFM
Minimum Frequency Mode. MFM is the minimum ratio supported by the processor
and can be read from MSR CEh [55:48].
MLC Mid-Level Cache
NCTF
Non-Critical to Function. NCTF locations are typically redundant ground or non-
critical reserved balls/lands, so the loss of the solder joint continuity at end of life
conditions will not affect the overall product functionality.
PAG Platform Power Architecture Guide (formerly PDDG)
PCH
Platform Controller Hub. The chipset with centralized platform capabilities including
the main I/O interfaces along with display connectivity, audio features, power
management, manageability, security, and storage features. The PCH may also be
referred as “chipset”.
PECI Platform Environment Control Interface
PEG PCI Express Graphics
PL1, PL2, PL3 Power Limit 1, Power Limit 2, Power Limit 3
Processor The 64-bit multi-core component (package)
Table 1-2. Terminology (Sheet 2 of 3)
Term Description