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Errata
32 Specification Update
KBL025 ENCLU[EGETKEY] Ignores KEYREQUEST.MISCMASK
Problem
The Intel® SGX (Software Guard Extensions) ENCLU[EGETKEY] instruction ignores
the MISCMASK field in KEYREQUEST structure when computing a provisioning key, a
provisioning seal key, or a seal key.
Implication
ENCLU[EGETKEY] will return the same key in response to two requests that differ
only in the value of KEYREQUEST.MISCMASK. Intel has not observed this erratum
with any commercially available software.
Workaround
When executing the ENCLU[EGETKEY] instruction, software should ensure the bits set
in KEYREQUEST.MISCMASK are a subset of the bits set in the current SECS’s
MISCSELECT field.
Status For the steppings affected, see the Summary Table of Changes.
KBL026 POPCNT Instruction May Take Longer to Execute Than Expected
Problem
POPCNT instruction execution with a 32 or 64 bit operand may be delayed until
previous non-dependent instructions have executed.
Implication
Software using the POPCNT instruction may experience lower performance than
expected.
Workaround None identified
Status For the steppings affected, see the Summary Table of Changes.
KBL027
ENCLU[EREPORT] May Cause a #GP When TARGETINFO.MISCSELECT is Non-
Zero
Problem
The Intel® SGX (Software Guard extensions) ENCLU[EREPORT] instruction may
cause a #GP (general protection fault) if any bit is set in TARGETINFO structure’s
MISCSELECT field.
Implication This erratum may cause unexpected general-protection exceptions inside enclaves.
Workaround
When executing the ENCLU[EREPORT] instruction, software should ensure the bits set
in TARGETINFO.MISCSELECT are a subset of the bits set in the current SECS’s
MISCSELECT field.
Status For the steppings affected, see the Summary Table of Changes.
KBL028
A VMX Transition Attempting to Load a Non-Existent MSR May Result in a
Shutdown
Problem
A VMX transition may result in a shutdown (without generating a machine-check
event) if a non-existent MSR is included in the associated MSR-load area. When such
a shutdown occurs, a machine check error will be logged with
IA32_MCi_STATUS.MCACOD (bits [15:0]) of 406H, but the processor does not issue
the special shutdown cycle. A hardware reset must be used to restart the processor.
Implication Due to this erratum, the hypervisor may experience an unexpected shutdown.
Workaround Software should not configure VMX transitions to load non-existent MSRs.
Status For the steppings affected, see the Summary Table of Changes.