User Guide

Errata
40 Specification Update
KBL063 Performance Monitoring Counters May Undercount When Using CPL Filtering
Problem
Performance Monitoring counters configured to count only OS or only USR events by
setting exactly one of bits 16 or 17 in IA32_PERFEVTSELx MSRs (186H-18DH) may
not count for a brief period during the transition to a new CPL.
Implication
A measurement of ring transitions (using the edge-detect bit 18 in
IA32_PERFEVTSELx) may undercount, such as CPL_CYCLES.RING0_TRANS (Event
5CH, Umask 01H). Additionally, the sum of an OS-only event and a USR-only event
may not exactly equal an event counting both OS and USR. Intel has not observed
any other software-visible impact
Workaround None identified.
Status For the steppings affected, see the Summary Table of Changes.
KBL064 Executing a 256 Bit AVX Instruction May Cause Unpredictable Behavior
Problem
Under complex micro-architectural conditions, executing a 256 AVX bit instruction
may result in unpredictable system behavior.
Implication When this erratum occurs, the system may behave unpredictably.
Workaround It is possible for the BIOS to contain a workaround for this erratum.
Status For the steppings affected, see the Summary Table of Changes.
KBL065 System May Hang During Display Power Cycles
Problem
When the display is turned on after being shutoff to save power or when the display
is exiting PSR (Panel Self Refresh) mode, the system may hang.
Implication When this erratum occurs the system may hang.
Workaround It is possible for the BIOS to contain a workaround for this erratum.
Status For the steppings affected, see the Summary Table of Changes.
KBL066
Certain Non-Canonical IA32_BNDCFGS Values Will Not Cause VM-Entry
Failures
Problem
If the VM-entry controls Load IA32_BNDCFGS field (bit 16) is 1, VM-entry should fail
when the value of the guest IA32_BNDCFGS field in the VMCS is not canonical (that
is, when bits 63:47 are not identical). Due to this erratum, VM-entry does not fail if
bits 63:48 are identical but differ from bit 47. In this case, VM-entry loads the
IA32_BNDCFGS MSR with a value in which bits 63:48 are identical to the value of bit
47 in the VMCS field.
Implication
If the value of the guest IA32_BNDCFGS field in the VMCS is not canonical, VM-entry
may load the IA32_BNDCFGS MSR with a value different from that of the VMCS field.
Workaround None identified.
Status For the steppings affected, see the Summary Table of Changes.