Specification Sheet

Power Management
62 Datasheet, Volume 1 of 2
Figure 4-1. Processor Power States
C0–Activemode
C1–Autohalt
C1E–Autohalt,lowfrequency,lowvoltage
C3–L1/L2cachesflush,clocksoff
C6–savecorestatesbeforeshutdownandPLLoff
C7–C6+LLCmaybeflushed
G1–Sleeping
S3cold–Sleep–SuspendToRam(STR)
S4–Hibernate–SuspendToDisk(STD),WakeuponPCH
S5–SoftOff–nopower,WakeuponPCH
G3–MechanicalOff
P0
Pn
*Note:PowerstatesavailabilitymayvarybetweenthedifferentSKUs
C8–C7+LLCmustbeflushed
G0–Working
S0–Processorpoweredon
C2–TemporarystatebeforeC3ordeeper.Memory
pathopen
G2–SoftOff