Specification Sheet

Datasheet, Volume 1 of 2 23
Interfaces
2.1.7 DDR I/O Interleaving
The processor supports I/O interleaving, which has the ability to swap DDR bytes for
routing considerations. BIOS configures the I/O interleaving mode before DDR
training.There are 2 supported modes:
•Interleave (IL)
•Non-Interleave (NIL)
The following table and figure describe the pin mapping between the IL and NIL modes.
Table 2-5. Interleave (IL) and Non-Interleave (NIL) Modes Pin Mapping
IL
(DDR4)
NIL
(DDR4
Channel Byte Channel Byte
DDR0 Byte0 DDR0 Byte0
DDR0 Byte1 DDR0 Byte1
DDR0 Byte2 DDR0 Byte4
DDR0 Byte3 DDR0 Byte5
DDR0 Byte4 DDR1 Byte0
DDR0 Byte5 DDR1 Byte1
DDR0 Byte6 DDR1 Byte4
DDR0 Byte7 DDR1 Byte5
DDR1 Byte0 DDR0 Byte2
DDR1 Byte1 DDR0 Byte3
DDR1 Byte2 DDR0 Byte6
DDR1 Byte3 DDR0 Byte7
DDR1 Byte4 DDR1 Byte2
DDR1 Byte5 DDR1 Byte3
DDR1 Byte6 DDR1 Byte6
DDR1 Byte7 DDR1 Byte7