Specification Sheet
Datasheet, Volume 1 of 2 113
Electrical Specifications
7.2.1.4 Vcc
SA
DC Specifications
7.2.1.5 Vcc
IO
DC Specifications
Table 7-5. System Agent (Vcc
SA
) Supply DC Voltage and Current Specifications
Symbol Parameter Segment Min Typ Max Unit Note
1,2
Vcc
SA
Voltage for
the System
Agent
S-Processor Line (fixed voltage)
— 1.05 — V 3,5
TOB
VCCSA
Vcc
SA
Tol er an ce
S-Processor Line
±5(DC+AC+ripple) % 8
I
CCMAX_VCCSA
Max Current
for V
CCSA
Rail
S-Processor Lines Quad core GT2
S-Processor Lines Hexa Core GT2
11.1
11.1
A
DC_LL
Vcc
SA
Loadline
S-Processor Line
10.3
m 6,7
T_OVS_MAX
Max
Overshoot
time
— — — 10 s
V_OVS_MAX
Max
Overshoot
— — — 70 mV
Notes:
1. Unless otherwise noted, all specifications in this table are based on estimates and simulations or empirical data. These
specifications will be updated with characterized data from silicon measurements at a later date.
2. Long term reliability cannot be assured in conditions above or below Max/Min functional limits.
3. The voltage specification requirements are measured across Vcc
SA
_
SENSE
and Vss
SA
_
SENSE
as near as possible to the processor
with an oscilloscope set to 100-MHz bandwidth, 1.5 pF maximum probe capacitance, and 1 M minimum impedance. The
maximum length of ground wire on the probe should be less than 5 mm. Ensure external noise from the system is not coupled
into the oscilloscope probe.
4. PSx refers to the voltage regulator power state as set by the SVID protocol.
5. Vcc
SA
voltage during boot (Vboot)1.05V for a duration of 2 seconds.
6. LL measured at sense points.
7. LL specification values should not be exceeded. If exceeded, power, performance and reliability penalty are expected.
8. Load Line (AC/DC) should be measured by the VRTT tool and programmed accordingly via the BIOS Load Line override setup
options. AC/DC Load Line BIOS programming directly affects operating voltages (AC) and power measurements (DC). A
superior board design with a shallower AC Load Line can improve on power, performance, and thermals compared to boards
designed for POR impedance.
9. For Voltage less than 1V, TOB will be 50 mV.
Table 7-6. Processor I/O (Vcc
IO
) Supply DC Voltage and Current Specifications (Sheet 1
of 2)
Symbol Parameter Segment Min Typ Max Unit
Note
1,2
Vcc
IO
Voltage for the memory controller
and shared cache
S
—
0.95
—V3,4,5
TOB
VCCIO
Vcc
IO
Tolerance All AC+DC:± 5 % 3,7
Icc
MAX_VCCIO
Max Current for V
CCIO
Rail S — — 6.4 A
T_OVS_MAX Max Overshoot time All — — 150 S6
V_OVS_MAX Max Overshoot at TDP All — — 30 mV 6