Specification Sheet

Electrical Specifications
54 Datasheet, Volume 1 of 2
5.5.2.4 SMBus DC Specifications
5.5.2.5 JTAG and TAP Signals DC Specifications
Figure 5-6. BCLK{0/1/2} Single Ended Clock Measure Points for Delta Cross Point
Symbol Parameter Min Max Units Notes
V
IL Input Low Voltage —
0.3*V
CCIO V
V
IH Input High Voltage
0.7*V
CCIO —V
V
Hysteresis Hysteresis
0.1*V
CCIO —V
V
OL Output Low Voltage —
0.2*V
CCIO V1
R
ON Buffer On Resistance 14 4 
I
L
Leakage Current Signals ±50 ±200 µA
Output Edge Rate (50 ohm to
V
CCIO, between V
IL
and V
IH
)1.13 5 V/ns1
Note:
1. Value obtained through test bench with 50 ohm pull up to
V
CCIO.
Symbol Parameter Min Max Units Notes
V
IL Input Low Voltage —
0.3*V
CCIO V
V
IH Input High Voltage
0.7*V
CCIO
—V
V
OL Output Low Voltage —
0.2*V
CCIO V
V
Hysteresis Hysteresis
0.1*V
CCIO —
SR Input Slew Rate: TCK0, TCK1, BPM_N[7:0],TDI 0.05 — V/ns 2
R
ON Buffer On Resistance Signals BPM_N[7:0], TDO 14 4 
I
IL Input Leakage Current Signals ±50 ±200 µA
SR Output Edge Rate (50 ohm to
V
CCIO) Signal:
BPM_N[7:0], PRDY_N, TDO
1.13 5 V/ns
1
Notes:
1. These are measured between V
IL
and V
IH
.
2. The signal edge rate must be met or the signal must transition monotonically to the asserted state.