Specification Sheet
Electrical Specifications
48 Datasheet, Volume 1 of 2
V
CCD (
V
CCD_012,
V
CCD_345)
I/O Voltage for DDR4
(Standard Voltage)
V
CCD
1.17
1.2 1.26 V
7, 9,
10, 11
V
CCSA Power supply for IIO
—
0.5 — 1.1 V
V
CCIO IO voltage supply input 0.937 1.00 1.057 V
V
CC33 Power supply for PIROM 3.14 3.3 3.47 V
Notes:
1. Unless otherwise noted, all specifications in this table apply to all processors.
2. These voltages are targets only. A variable voltage source should exist on systems in the event that a different voltage is
required.
3. The VCCIN voltage specification requirements are measured across the remote sense pin pairs (VCCIN_SENSE and
VSS_VCCIN_SENSE) on the processor package. Voltage measurement should be taken with a DC to 100 MHz bandwidth
oscilloscope limit (or DC to 20 MHz for older model oscilloscopes), using a 1.5 pF maximum probe capacitance, and 1 Mohm
minimum impedance. The maximum length of the ground wire on the probe should be less than 5 mm to ensure external
noise from the system is not coupled in the scope probe.
4. Refer to VCCIN Static and Transient Tolerance Processor and corresponding Figure 5-2, “VCCIN Static and Transient
Tolerance Load Lines 1.0 mOHM” on page 50. The processor should not be subjected to any static VCCIN level that exceeds
the VCCIN_MAX associated with any particular current. Failure to adhere to this specification can shorten processor lifetime.
5. ICCIN_MAX is specified at the relative VCC_MAX point on the VCCIN load line. The processor is capable of drawing
ICCIN_MAX for up to 2 ms.
6. This specification represents the VCCIN reduction or VCCIN increase due to each VID transition. For Voltage Identification
(VID), see Table 5-4, “VR13.0 Reference Code Voltage Identification (VID) Table”.
7. Baseboard bandwidth is limited to 20 MHz.
8. N/A
9. DC + AC + Ripple = Tolerance
10. VCCD tolerance at processor pins. Required in order to meet +/-5% tolerance at processor die.
11. The VCCD012, VCCD345 voltage specification requirements are measured across vias on the platform. Choose VCCD012 or
VCCD345 vias close to the socket and measure with a DC to 100 MHz bandwidth oscilloscope limit (or DC to 20 MHz for
older model oscilloscopes), using 1.5 pF maximum probe capacitance, and 1M ohm minimum impedance. The maximum
length of the ground wire on the probe should be less than 5 mm to ensure external noise from the system is not coupled in
the scope probe.
12. VCCIN has a Vboot setting of 1.7 V and is not included in the PWRGOOD indication.
Table 5-12. Current (ICCIN_MAX and ICCIN_TDC) Specification
TDP (W) 140 165
VCCIN ICCMAX (A) 200 205
VCCSA ICCMAX (A) 15 15
VCCIO ICCMAX (A) 12 12
VCCD ICCMAX (A) 6 6
VCCIN TDC (A) 77 89
VCCSA TDC (A) 14 14
VCCIO TDC (A) 11 11
VCCD TDC (A) 4 4
Pmax Package (W) 308 363
Notes:
1. Unless otherwise noted, all specifications in this table apply to all processors.
2. N/A
3. I
CCIN_TDC (Thermal Design Current) is the sustained (DC equivalent) current that the processor is capable of drawing
indefinitely and should be used for the voltage regulator thermal assessment. The voltage regulator is responsible for
monitoring its temperature and asserting the necessary signal to inform the processor of a thermal excursion.
4. Minimum V
CCIN and maximum ICCIN are specified at the maximum processor case temperature (T
CASE
). ICCIN_MAX is
specified at the relative VCCIN_MAX point on the VCCIN load line. The processor is capable of drawing ICCIN_MAX for up to
2 ms.
Table 5-11. Voltage Specification (Sheet 2 of 2)
Symbols Parameter
Voltage
Plane
Min Nom Max Unit Notes
1