User Manual

Datasheet 45

Electrical Specifications
04 V
CCD_23
05 +1 not used
Notes:
1. Check with VR vendors for determining the physical address assignment method for their controllers.
2. VR addressing is assigned on a per voltage rail basis.
3. Dual VR controllers will have two addresses with the lowest order address, always being the higher phase
count.
4. For future platform flexibility, the VR controller should include an address offset, as shown with +1 not
used.
Table 5-3. VR12.5 Reference Code Voltage Identification (VID) Table (Sheet 1 of 2)
HEX VCCIN HEX VCCIN HEX VCCIN HEX VCCIN HEX VCCIN HEX VCCIN
00 0.00 55 1.34 78 1.69 9B 2.04 BE 2.39 E1 2.74
33 1.00 56 1.35 79 1.70 9C 2.05 BF 2.40 E2 2.75
34 1.01 57 1.36 7A 1.71 9D 2.06 C0 2.41 E3 2.76
35 1.02 58 1.37 7B 1.72 9E 2.07 C1 2.42 E4 2.77
36 1.03 59 1.38 7C 1.73 9F 2.08 C2 2.43 E5 2.78
37 1.04 5A 1.39 7D 1.74 A0 2.09 C3 2.44 E6 2.79
38 1.05 5B 1.40 7E 1.75 A1 2.10 C4 2.45 E7 2.80
39 1.06 5C 1.41 7F 1.76 A2 2.11 C5 2.46 E8 2.81
3A 1.07 5D 1.42 80 1.77 A3 2.12 C6 2.47 E9 2.82
3B 1.08 5E 1.43 81 1.78 A4 2.13 C7 2.48 EA 2.83
3C 1.09 5F 1.44 82 1.79 A5 2.14 C8 2.49 EB 2.84
3D 1.10 60 1.45 83 1.80 A6 2.15 C9 2.50 EC 2.85
3E 1.11 61 1.46 84 1.81 A7 2.16 CA 2.51 ED 2.86
3F 1.12 62 1.47 85 1.82 A8 2.17 CB 2.52 EE 2.87
40 1.13 63 1.48 86 1.83 A9 2.18 CC 2.53 EF 2.88
41 1.14 64 1.49 87 1.84 AA 2.19 CD 2.54 F0 2.89
42 1.15 65 1.50 88 1.85 AB 2.20 CE 2.55 F1 2.90
43 1.16 66 1.51 89 1.86 AC 2.21 CF 2.56 F2 2.91
44 1.17 67 1.52 8A 1.87 AD 2.22 D0 2.57 F3 2.92
45 1.18 68 1.53 8B 1.88 AE 2.23 D1 2.58 F4 2.93
46 1.19 69 1.54 8C 1.89 AF 2.24 D2 2.59 F5 2.94
47 1.20 6A 1.55 8D 1.90 B0 2.25 D3 2.60 F6 2.95
48 1.21 6B 1.56 8E 1.91 B1 2.26 D4 2.61 F7 2.96
49 1.22 6C 1.57 8F 1.92 B2 2.27 D5 2.62 F8 2.97
4A 1.23 6D 1.58 90 1.93 B3 2.28 D6 2.63 F9 2.98
4B 1.24 6E 1.59 91 1.94 B4 2.29 D7 2.64 FA 2.99
4C 1.25 6F 1.60 92 1.95 B5 2.30 D8 2.65 FB 3.00
4D 1.26 70 1.61 93 1.96 B6 2.31 D9 2.66 FC 3.01
4E 1.27 71 1.62 94 1.97 B7 2.32 DA 2.67 FD 3.02
4F 1.28 72 1.63 95 1.98 B8 2.33 DB 2.68 FE 3.03
Table 5-2. SVID Address Usage (Sheet 2 of 2)
PWM Address (HEX) Processor