Datasheet

Symbol Parameter Min Max Units Notes
I
L
Leakage Current Signals 50 200 µA
Output Edge Rate
(50 ohm to V
CCIO_IN
, between V
IL
and V
IH
)
0.05 0.6 V/ns 1
Note:
1. Value obtained through test bench with 50Ω pull up to V
CCIO_IN
.
JTAG and TAP Signals DC Specifications
Symbol Parameter Min Max Units Notes
V
IL
Input Low Voltage 0.4*V
CCIO_IN
V
V
IH
Input High Voltage 0.8*V
CCIO_IN
V
V
IL
Input Low Voltage: TCK 0.4*V
CCIO_IN
V
V
IH
Input High Voltage: TCK 0.6*V
CCIO_IN
V
V
OL
Output Low Voltage 0.2*V
CCIO_IN
V
V
Hysteresis
Hysteresis 0.1*V
CCIO_IN
R
ON
Buffer On Resistance Signals
BPM_N[7:0], TDO
4 14 Ω
I
IL
Input Leakage Current Signals 50 200 µA
Output Edge Rate
(50 ohm to V
CCIO_IN
)
Signal: BPM_N[7:0], PRDY_N, TDO
0.2 1.5 V/ns 1
Note:
1. These are measured between V
IL
and V
IH
.
2. The signal edge rate must be met or the signal must transition monotonically to the asserted state.
Serial VID Interface (SVID) DC Specifications
Symbol
Parameter Min Nom Max Units Notes
V
IL
Input Low Voltage Signals SVIDDATA, SVIDALERT_N 0.4*V
CCIO_IN
V 1
V
IH
Input High Voltage Signals SVIDDATA, SVIDALERT_N 0.7*V
CCIO_IN
V 1
V
OL
Output Low Voltage Signals: SVIDCLK, SVIDDATA 0.2*V
CCIO_IN
V 1, 5
V
Hysteresis
Hysteresis 0.05*V
CCIO_IN
V 1
R
ON
Buffer On Resistance Signals SVIDCLK, SVIDDATA 4 14 Ω 2
I
IL
Input Leakage Current 50 200 µA 3
Input Edge Rate
Signal: SVIDALERT_N
0.05 V/ns 4
Output Edge Rate 0.20 1.5 V/ns 4, 5
Note:
1. V
CCIO_IN
refers to instantaneous V
CCIO_IN
.
2. Measured at 0.31*V
CCIO_IN
.
3. Vin between 0V and V
CCIO_IN
(applies to SVIDDATA and SVIDALERT_N only).
4. These are measured between V
IL
and V
IH
.
5. Value obtained through test bench with 50Ω pull up to V
CCIO_IN
.
2.9.3.5
2.9.3.6
Electrical Specifications—Intel
®
Xeon
®
Processor E5-1600 and E5-2600 v3 Product Families
Intel
®
Xeon
®
Processor E5-1600 and E5-2600 v3 Product Families, Volume 1 of 2, Electrical
September 2014 Datasheet
Order No.: 330783-001 41