Specification Sheet
Interfaces
54 Intel
®
 Xeon
®
 Processor E5-1600/E5-2600/E5-4600 v2 Product Families 
Datasheet Volume One of Two
The ‘maximum time window’ in bits [54:48] is representative of the maximum rate at 
which the power control unit (PCU) can sample the package energy consumption and 
reactively take the necessary measures to meet the imposed power limits. 
Programming too large a time window runs the risk of the PCU not being able to 
monitor and take timely action on package energy excursions. On the other hand, 
programming too small a time window may not give the PCU enough time to sample 
energy information and enforce the limit. The minimum value of the ‘time window’ can 
be obtained by reading bits [21:15] of the PWR_LIMIT_MISC_INFO CSR using the PECI 
RdPCIConfigLocal() command.
2.5.2.6.15 “Wake on PECI” Mode bit Write / Read
Setting the “Wake on PECI” mode bit enables successful comple
tion of the 
WrPCIConfigLocal(), RdPCIConfigLocal(), WrPCIConfig() and RdPCIConfig() PECI 
commands by forcing a package ‘pop-up’ to the C2 state to service these commands if 
the processor is in a low-power state. The exact power impact of such a ‘pop-up’ is 
determined by the product SKU, the C-state from which the pop-up is initiated and the 
negotiated PECI bit rate. A ‘reset’ or ‘clear’ of this bit or simply not setting the “Wake 
on PECI” mode bit could result in a “timeout” response (completion code of 0x82) from 
the processor indicating that the resources required to service the command are in a 
low power state.
Alternatively, this mode bit can also be read to determine PECI behavior in package 
states C3 or deeper.
2.5.2.6.16 Accumulated Run Time Read
This read returns the total time for which the processor has been ex
ecuting with 
a 
resolution of 1mS per count. This is tracked by a 32-bit counter that rolls over on 
reaching the maximum value. This counter activates and starts counting for the first 
time at RESET_N de-assertion.
Figure 2-28. Package Power SKU Data
Package Power SKU (lower bits)
Reserved
14
Minimum Package Power
16
TDP Package Power
30 015
Reserved
31
Package Power SKU (upper bits)
Maximum Package Power
3246
Reserved
47
Maximum Time 
Window
4854
Reserved
5563










