Specification Sheet

Signal Descriptions
128 Intel
®
Xeon
®
Processor E5-1600/E5-2600/E5-4600 v2 Product Families
Datasheet Volume One of Two
SOCKET_ID[1:0]
Socket ID Strap. Socket identification configuration straps for
establishing the PECI address, Intel® QPI Node ID, and other
settings. This signal is used in combination with FRMAGENT to
determine whether the socket is a legacy socket, bootable
firmware agent is present, and DMI links are used in PCIe* mode
(instead of DMI2 mode). Each processor socket consumes one
Node ID, and there are 128 Home Agent tracker entries. This
signal is pulled down on the die, refer to Tab l e 7 -6 for details.
TEST[4:0]
Test[4:0] must be individually connected to an power source or
ground through a resistor for proper processor operation.
THERMTRIP_N
Assertion of THERMTRIP_N (Thermal Trip) indicates one of two
possible critical over-temperature conditions: One, the processor
junction temperature has reached a level beyond which permanent
processor damage may occur and Two, the system memory
interface has exceeded a critical temperature limit set by BIOS.
Measurement of the processor junction temperature is
accomplished through multiple internal thermal sensors that are
monitored by the Digital Thermal Sensor (DTS). Simultaneously,
the Power Control Unit (PCU) monitors external memory
temperatures via the dedicated SMBus interface to the DIMMs. If
any of the DIMMs exceed the BIOS defined limits, the PCU will
signal THERMTRIP_N to prevent damage to the DIMMs. Once
activated, the processor will stop all execution and shut down all
PLLs. To further protect the processor, its core voltage (VCC),
VTTA, VTTD, VSA, VCCPLL, VCCD supplies must be removed
following the assertion of THERMTRIP_N. Once activated,
THERMTRIP_N remains latched until RESET_N is asserted. While
the assertion of the RESET_N signal may de-assert THERMTRIP_N,
if the processor's junction temperature remains at or above the
trip level, THERMTRIP_N will again be asserted after RESET_N is
de-asserted. This signal can also be asserted if the system
memory interface has exceeded a critical temperature limit set by
BIOS. This signal is sampled after PWRGOOD assertion.
TXT_AGENT
Intel® Trusted Execution Technology (Intel® TXT) Agent Strap.
0 = Default. The socket is not the Intel® TXT Agent.
1 = The socket is the Intel® TXT Agent.
In non-Scalable DP platforms, the legacy socket (identified by
SOCKET_ID[1:0] = 00b) with Intel® TXT Agent should always set
the TXT_AGENT to 1b.
On Scalable DP platforms the Intel TXT AGENT is at the Node
Controller.
This signal is pulled down on the die, refer to Tab l e 7 -6 for details.
TXT_PLTEN
Intel® Trusted Execution Technology (Intel® TXT) Platform Enable
Strap.
0 = The platform is not Intel® TXT enabled. All sockets should be
set to zero. Scalable DP (sDP) platforms should choose this setting
if the Node Controller does not support Intel TXT.
1 = Default. The platform is Intel® TXT enabled. All sockets should
be set to one. In a non-Scalable DP platform this is the default.
When this is set, Intel TXT functionality requires user to explicitly
enable Intel TXT via BIOS setup.
This signal is pulled up on the die, refer to Tab l e 7 -6 for details.
Table 6-14. Processor Asynchronous Sideband Signals (Sheet 3 of 3)
Signal Name Description