Datasheet

Datasheet 7
MC_RIR_WAY_CH2_6, MC_RIR_WAY_CH2_7
MC_RIR_WAY_CH2_8, MC_RIR_WAY_CH2_9
MC_RIR_WAY_CH2_10, MC_RIR_WAY_CH2_11
MC_RIR_WAY_CH2_12, MC_RIR_WAY_CH2_13
MC_RIR_WAY_CH2_14, MC_RIR_WAY_CH2_15
MC_RIR_WAY_CH2_16, MC_RIR_WAY_CH2_17
MC_RIR_WAY_CH2_18, MC_RIR_WAY_CH2_19
MC_RIR_WAY_CH2_20, MC_RIR_WAY_CH2_21
MC_RIR_WAY_CH2_22, MC_RIR_WAY_CH2_23
MC_RIR_WAY_CH2_24, MC_RIR_WAY_CH2_25
MC_RIR_WAY_CH2_26, MC_RIR_WAY_CH2_27
MC_RIR_WAY_CH2_28, MC_RIR_WAY_CH2_29
MC_RIR_WAY_CH2_30, MC_RIR_WAY_CH2_31 ........................................92
2.13 Memory Thermal Control....................................................................................93
2.13.1 MC_THERMAL_CONTROL0
MC_THERMAL_CONTROL1
MC_THERMAL_CONTROL2......................................................................93
2.13.2 MC_THERMAL_STATUS0
MC_THERMAL_STATUS1
MC_THERMAL_STATUS2........................................................................93
2.13.3 MC_THERMAL_DEFEATURE0
MC_THERMAL_DEFEATURE1
MC_THERMAL_DEFEATURE2...................................................................94
2.13.4 MC_THERMAL_PARAMS_A0
MC_THERMAL_PARAMS_A1
MC_THERMAL_PARAMS_A2....................................................................94
2.13.5 MC_THERMAL_PARAMS_B0
MC_THERMAL_PARAMS_B1
MC_THERMAL_PARAMS_B2....................................................................95
2.13.6 MC_COOLING_COEF0
MC_COOLING_COEF1
MC_COOLING_COEF2............................................................................95
2.13.7 MC_CLOSED_LOOP0
MC_CLOSED_LOOP1
MC_CLOSED_LOOP2 .............................................................................96
2.13.8 MC_THROTTLE_OFFSET0
MC_THROTTLE_OFFSET1
MC_THROTTLE_OFFSET2 .......................................................................96
2.13.9 MC_RANK_VIRTUAL_TEMP0
MC_RANK_VIRTUAL_TEMP1
MC_RANK_VIRTUAL_TEMP2 ...................................................................97
2.13.10 MC_DDR_THERM_COMMAND0
MC_DDR_THERM_COMMAND1
MC_DDR_THERM_COMMAND2................................................................97
2.13.11 MC_DDR_THERM_STATUS0
MC_DDR_THERM_STATUS1
MC_DDR_THERM_STATUS2....................................................................98
2.14 Integrated Memory Controller Miscellaneous Registers............................................98
2.14.1 MC_DIMM_CLK_RATIO_STATUS .............................................................98
2.14.2 MC_DIMM_CLK_RATIO ..........................................................................99