Datasheet

Processor Integrated I/O (IIO) Configuration Registers
94 Datasheet, Volume 2
Table 3-9. Core Registers (Device 8, Function 1) — Semaphore and ScratchPad
Registers (Sheet 1 of 2)
DID VID 000h SR[1] 080h
PCISTS PCICMD 004h SR[2] 084h
CCR RID 008h SR[3] 088h
HDR CLSR 00Ch SR[4] 08Ch
010h SR[5] 090h
014h SR[6] 094h
018h SR[7] 098h
01Ch SR[8] 09Ch
020h SR[9] 0A0h
024h SR[10] 0A4h
028h SR[11] 0A8h
SID SVID 02Ch SR[12] 0ACh
030h SR[13] 0B0h
CAPPTR
1
Notes:
1. CAPPTR points to the first capability block.
034h SR[14] 0B4h
038h SR[15] 0B8h
INTPIN INTLIN 03Ch SR[16] 0BCh
EXPCAP NXTPTR CAPID 040h SR[17] 0C0h
DEVCAP 044h SR[18] 0C4h
DEVSTS DEVCTRL 048h SR[19] 0C8h
RESERVEDPCI Express Header space
04Ch SR[20] 0CCh
050h SR[21] 0D0h
054h SR[22] 0D4h
058h SR[23] 0D8h
05Ch CWR[0] 0DCh
060h CWR[1] 0E0h
064h CWR[2] 0E4h
068h CWR[3] 0E8h
06Ch CWR[4] 0ECh
070h CWR[5] 0F0h
074h CWR[6] 0F4h
078h CWR[7] 0F8h
SR[0] 07Ch CWR[8] 0FCh