Datasheet

Processor Integrated I/O (IIO) Configuration Registers
72 Datasheet, Volume 2
3.3.4.27 ROOTSTS—PCI Express* Root Status Register
The PCI Express Root Status register specifies parameters specific to the root complex
port.
Register: ROOTSTS
Device: 0 (DMI), 3, 5 (PCIe)
Function: 0
Offset: B0h
Bit Attr Default Description
31:18 RV 0h Reserved
17 RO 0h
PME Pending
This field indicates that another PME is pending when the PME Status bit is set.
When the PME Status bit is cleared by software; the pending PME is delivered
by hardware by setting the PME Status bit again and updating the Requestor
ID appropriately. The PME pending bit is cleared by hardware if no more PMEs
are pending.
16 RW1C 0h
PME Status
This field indicates a PM_PME message (either from the link or internally from
within that root port) was received at the port.
1 = PME was asserted by a requester as indicated by the PMEREQID field
This bit is cleared by software by writing a 1.
15:0 RO 0000h
PME Requester ID
This field indicates the PCI requester ID of the last PME requestor. If the root
port itself was the source of the (virtual) PME message, then a RequesterID of
IIOBUSNO:DevNo:0 is logged in this field.