Datasheet

Datasheet, Volume 2 27
Processor Integrated I/O (IIO) Configuration Registers
3 Processor Integrated I/O (IIO)
Configuration Registers
3.1 Processor IIO Devices (PCI Bus 0)
The processor Integrated I/O (IIO) contains the following PCI devices within a single,
physical component. The configuration registers for the devices are mapped as devices
residing on PCI Bus 0.
• Device 0 — DMI Root Port. Logically this appears as a PCI device residing on PCI
Bus 0. Device 0 contains the standard PCI header registers, extended PCI
configuration registers and DMI device specific configuration registers.
• Device 3 — PCI Express Root Port 1. Logically this appears as a “virtual” PCI-to-
PCI bridge residing on PCI Bus 0 and is compliant with the PCI Express Local Bus
Specification Revision 1.0. Device 3 contains the standard PCI Express/PCI
configuration registers including PCI Express Memory Address Mapping registers. It
also contains the extended PCI Express configuration space that include PCI
Express error status/control registers and Isochronous and Virtual Channel
controls.
• Device 5 — PCI Express Root Port 3. Logically this appears as a “virtual” PCI-to-
PCI bridge residing on PCI Bus 0 and is compliant with PCI Express Local Bus
Specification Revision 1.0. Device 5 contains the standard PCI Express/PCI
configuration registers including PCI Express Memory Address Mapping registers. It
also contains the extended PCI Express configuration space that include PCI
Express error status/control registers and Isochronous and Virtual Channel
controls.
• Device 8 — Integrated I/O Core. This device contains the Standard PCI registers
for each of its functions. This device implements four functions; Function 0 contains
Address Mapping, Intel VT-d related registers and other system management
registers. Function 1 contains Semaphore and Scratchpad registers. Function 3
contains System Control/Status registers. Function 4 contains miscellaneous
control/status registers on power management and throttling.
• Device 16 — Intel QuickPath Interconnect. Device 16, Function 0 contains the
Intel QuickPath Interconnect configuration registers for Intel QuickPath
Interconnect Link. Device 16, Function 1 contains the routing and protocol.