Datasheet

Processor Uncore Configuration Registers
262 Datasheet, Volume 2
4.11.2 MC_DOD_CH1_0
MC_DOD_CH1_1
Channel 1 DIMM Organization Descriptor Register.
Device: 5
Function: 1
Offset: 48h, 4Ch, 50h, 54h
Access as a DWord
Bit Attr Default Description
31:13 RO 0 Reserved
12:10 RW 0
RANKOFFSET
Rank Offset for calculating RANK. This corresponds to the first logical rank on
the DIMM. The rank offset is always programmed to 0 for the DIMM 0 DOD
registers. (DIMM 0 rank offset is always 0.) DIMM 1 DOD rank offset is 4 for
two DIMMs per channel.
9RW 0DIMMPRESENT. DIMM slot is populated.
8:7 RW 0
NUMBANK
This field defines the number of (real, not shadow) banks on these DIMMs.
00 = Four-banked
01 = Eight-banked
10 = Sixteen-banked
6:5 RW 0
NUMRANK. Number of Ranks
This field defines the number of ranks on these DIMMs.
00 = Single Ranked
01 = Double Ranked
10 = Reserved
4:2 RW 0
NUMROW. Number of Rows
This field defines the number of rows within these DIMMs.
000 = 2^12 Rows
001 = 2^13 Rows
010 = 2^14 Rows
011 = 2^15 Rows
100 = 2^16 Rows
1:0 RW 0
NUMCOL. Number of Columns
This field defines the number of columns within on these DIMMs.
00 = 2^10 columns
01 = 2^11 columns
10 = 2^12 columns
11 = RSVD