Datasheet
Processor Uncore Configuration Registers
246 Datasheet, Volume 2
14:11 RW 0
tdrRdTWr
Minimum delay between Read followed by a write to different ranks on the
same DIMM.
000 = 2
001 = 3
010 = 4
011 = 5
100 = 6
101 = 7
110 = 8
111 = 9
10:7 RW 0
tsrRdTWr
Minimum delay between Read followed by a write to the same rank.
000 = RSVD
001 = RSVD
010 = RSVD
011 = 5
100 = 6
101 = 7
110 = 8
111 = 9
6:4 RW 0
tddRdTRd
Minimum delay between reads to different DIMMs.
000 = 2
001 = 3
010 = 4
011 = 5
100 = 6
101 = 7
110 = 8
111 = 9
3:1 RW 0
tdrRdTRd
Minimum delay between reads to different ranks on the same DIMM.
000 = 2
001 = 3
010 = 4
011 = 5
100 = 6
101 = 7
110 = 8
111 = 9
0RW 0
tsrRdTRd Minimum delay between reads to the same rank.
0 = 4
1 = 6
Device: 4, 5
Function: 0
Offset: 80h
Access as a DWord
Bit Attr Default Description