Datasheet

Datasheet, Volume 2 189
Processor Uncore Configuration Registers
Table 4-6. Device 3, Function 0 — Integrated Memory Controller Registers
DID VID 00h 80h
PCISTS PCICMD 04h
84h
CCR RID 08h
88h
HDR 0Ch 8Ch
10h 90h
14h 94h
18h 98h
1Ch 9Ch
20h A0h
24h A4h
28h A8h
SID SVID 2Ch
ACh
30h B0h
34h B4h
38h B8h
3Ch BCh
40h C0h
44h C4h
MC_CONTROL 48h
C8h
MC_STATUS 4Ch
CCh
MC_SMI_DIMM_ERROR_STATUS 50h
D0h
MC_SMI_CNTRL 54h
D4h
58h D8h
MC_RESET_CONTROL 5Ch
DCh
MC_CHANNEL_MAPPER 60h
E0h
MC_MAX_DOD 64h
E4h
MC_CFG_LOCK 68h
E8h
6Ch ECh
MC_RD_CRDT_INIT 70h
F0h
MC_CRDT_WR_THLD 74h
F4h
78h F8h
7Ch FCh