Datasheet
Processor Uncore Configuration Registers
186 Datasheet, Volume 2
Table 4-3. Device 0, Function 1 — System Address Decoder Registers
DID VID 00h SAD_DRAM_RULE_0 80h
PCISTS PCICMD 04h SAD_DRAM_RULE_1 84h
CCR RID 08h SAD_DRAM_RULE_2 88h
HDR 0Ch SAD_DRAM_RULE_3 8Ch
10h SAD_DRAM_RULE_4 90h
14h SAD_DRAM_RULE_5 94h
18h SAD_DRAM_RULE_6 98h
1Ch SAD_DRAM_RULE_7 9Ch
20h A0h
24h A4h
28h A8h
SID SVID 2Ch
ACh
30h B0h
34h B4h
38h B8h
3Ch BCh
SAD_PAM0123 40h SAD_INTERLEAVE_LIST_0 C0h
SAD_PAM456 44h SAD_INTERLEAVE_LIST_1 C4h
SAD_HEN 48h SAD_INTERLEAVE_LIST_2 C8h
SAD_SMRAM 4Ch SAD_INTERLEAVE_LIST_3 CCh
SAD_PCIEXBAR
50h SAD_INTERLEAVE_LIST_4 D0h
54h SAD_INTERLEAVE_LIST_5 D4h
SAD_TPCIEXBAR
58h SAD_INTERLEAVE_LIST_6 D8h
5Ch SAD_INTERLEAVE_LIST_7 DCh
SAD_MCSEG_BASE
60h
E0h
64h
E4h
SAD_MCSEG_MASK
68h
E8h
6Ch
ECh
SAD_MESEG_BASE
70h
F0h
74h
F4h
SAD_MESEG_MASK
78h
F8h
7Ch
FCh