Datasheet

Datasheet, Volume 2 173
Processor Integrated I/O (IIO) Configuration Registers
3.6.1.19 TXT.SCRATCHPAD0—Intel
®
TXT Scratch Pad Register 0
Intel TXT Scratch Pad Register.
General Behavioral Rules:
• This is a read/write register.
• This register is locked by TXT.CMD.LOCK.BASE. When locked this register is
updated by private or Intel TXT writes, but not public writes.
• This register is available for read or write in the Public and Private Intel TXT
configuration space.
3.6.1.20 TXT.SCRATCHPAD1—Intel
®
TXT Scratch Pad Register 1
Intel TXT Scratch Pad Register.
General Behavioral Rules:
• This is a read/write register.
• This register is available for read or write in the Public and Private Intel TXT
configuration space.
Base: TXT_TXT Offset: 0320h
Base: TXT_PR Offset: 0320h
Base: TXT_PB Offset: 0320h
Bit Attr Default Description
63:0 RWLB 0h
TXT.SCRATCHPAD0[63:0]
This register will be locked for access using Intel TXT public space when the
TXT.CMD.LOCK.BASE is issued. When locked this register is updated by
private or Intel TXT writes, but not public writes.
Base: TXT_TXT Offset: 0328h
Base: TXT_PR Offset: 0328h
Base: TXT_PB Offset: 0328h
Bit Attr Default Description
63:0 RW 0h TXT.SCRATCHPAD1[63:0]